FPGA Electric Engineer 1 or 2 - IPT GPI

Company: Northrop Grumman
Location: Chandler
Posted on: April 2, 2026

Job Description:

RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Space Systems is looking for an FPGA Electric Engineer 1 or 2 - IPT GPI to support the Glide Phase Interceptor Program within the Launch Vehicles business unit in Chandler, Arizona . As an FPGA design engineer, you will work closely with senior FPGA engineers and cross-disciplinary teams to address design challenges and ensure successful integration of build onto hardware. Your role will primarily focus on developing and executing test benches, independent of the design group, to validate that FPGA designs meet functional and timing requirements while adhering to internal design standards. The selected candidate should thrive in a fast-paced work environment with significantly diverse assignments and collaborative/team settings across all levels. Job Duties : Work closely with senior FPGA engineers or other engineering teams (e.g. hardware, algorithms, or software) to address design challenges Develop and execute test benches to validate that the design meets functional and timing requirements Compliance with standards, especially familiarizing with internal design standards Ensure configuration management of possible multiple build configurations of FPGA bitstreams to support different use cases or platform requirements Prepare design documentation, including design schematics, simulation results, and verification reports and present the to the team and leads Continuous learning by staying updated with evolving FPGA technology, tools, and methodologies Basic Qualifications: This is a dual level role FPGA Electric Engineer 1 Bachelor’s degree in Electrical Engineering or Physics from an accredited university and 0 years of related experience, or a Master’s degree Security Clearance: U.S. citizenship; ability to obtain and maintain a DoD FPGA/SoC Design: Proven experience in designing complex FPGA firmware using VHDL or Verilog. FPGA/SoC Design: Experience with firmware development for Xilinx/AMD FPGAs & SoCs. Versal experience a plus. FPGA/SoC Design: Experience with managing design constraints (timing, power, I/O) and performing static timing analysis to meet critical performance targets using Vivado or equivalent tools. FPGA/SoC Design: Experience with developing complex firmware blocks in VHDL (preferred) or Verilog targeting various FPGA families Experience with high-speed communication protocols (e.g. PCIe, Ethernet) Verification: Proficiency in development, verification & debug of MOSA type interfaces/buses (UART, SDLC, Ethernet, PCIe, AXI4) Verification: Proficiency with simulation tools (Questa/ModelSim) and hardware debugging tools (logic analyzers, oscilloscopes). Verification: Proficiency in creating and executing verification plans using simulation, analysis, and hardware test. Verification: Proficiency with Open Source VHDL Verification Methodology (OSVVM) or Universal Verification Methodology (UVM). OSVVM preferred Preferred Qualifications Active Secret clearance or above at point of point of application. Basic Qualifications: This is a dual level role FPGA Electric Engineer 2 Bachelor’s degree in Electrical Engineering or Physics from an accredited university and 2 years of related experience, or a Master’s degree Security Clearance: U.S. citizenship; ability to obtain and maintain a DoD FPGA/SoC Design: Proven experience in designing complex FPGA firmware using VHDL or Verilog. FPGA/SoC Design: Experience with firmware development for Xilinx/AMD FPGAs & SoCs. Versal experience a plus. FPGA/SoC Design: Experience with managing design constraints (timing, power, I/O) and performing static timing analysis to meet critical performance targets using Vivado or equivalent tools. FPGA/SoC Design: Experience with developing complex firmware blocks in VHDL (preferred) or Verilog targeting various FPGA families Experience with high-speed communication protocols (e.g. PCIe, Ethernet) Verification: Proficiency in development, verification & debug of MOSA type interfaces/buses (UART, SDLC, Ethernet, PCIe, AXI4) Verification: Proficiency with simulation tools (Questa/ModelSim) and hardware debugging tools (logic analyzers, oscilloscopes). Verification: Proficiency in creating and executing verification plans using simulation, analysis, and hardware test. Verification: Proficiency with Open Source VHDL Verification Methodology (OSVVM) or Universal Verification Methodology (UVM). OSVVM preferred Preferred Qualifications Active Secret clearance or above at point of point of application. Primary Level Salary Range: $65,800.00 - $98,800.00 Secondary Level Salary Range: $79,300.00 - $118,900.00 The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates. Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Keywords: Northrop Grumman, Catalina Foothills , FPGA Electric Engineer 1 or 2 - IPT GPI, Engineering , Chandler, Arizona